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<div class="title">xi2stx_chsts.h File Reference</div>  </div>
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Macros</h2></td></tr>
<tr><td colspan="2"><div class="groupHeader">AES Status and Register Masks and Shifts.For formats/line protocols</div></td></tr>
<tr><td colspan="2"><div class="groupText"><p>check the AES Standard specifications document. </p>
</div></td></tr>
<tr class="memitem:gacc72d75920ade372109d305286e1c5fb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#gacc72d75920ade372109d305286e1c5fb">XI2S_TX_AES_STS_USE_OF_CH_STS_BLK_SHIFT</a>&#160;&#160;&#160;(0)</td></tr>
<tr class="memdesc:gacc72d75920ade372109d305286e1c5fb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Use of Channel Status Block bit shift.  <a href="group__i2stx.html#gacc72d75920ade372109d305286e1c5fb">More...</a><br/></td></tr>
<tr class="separator:gacc72d75920ade372109d305286e1c5fb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaffd31964c7785f76f3c1e443e6f306dd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#gaffd31964c7785f76f3c1e443e6f306dd">XI2S_TX_AES_STS_USE_OF_CH_STS_BLK_MASK</a>&#160;&#160;&#160;(1 &lt;&lt; <a class="el" href="group__i2stx.html#gacc72d75920ade372109d305286e1c5fb">XI2S_TX_AES_STS_USE_OF_CH_STS_BLK_SHIFT</a>)</td></tr>
<tr class="memdesc:gaffd31964c7785f76f3c1e443e6f306dd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Use of Channel Status Block mask.  <a href="group__i2stx.html#gaffd31964c7785f76f3c1e443e6f306dd">More...</a><br/></td></tr>
<tr class="separator:gaffd31964c7785f76f3c1e443e6f306dd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaed277941e701357e05662d27cf26f8e4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#gaed277941e701357e05662d27cf26f8e4">XI2S_TX_AES_STS_LINEAR_PCM_ID_SHIFT</a>&#160;&#160;&#160;(1)</td></tr>
<tr class="memdesc:gaed277941e701357e05662d27cf26f8e4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Linear PCM Identification bit shift.  <a href="group__i2stx.html#gaed277941e701357e05662d27cf26f8e4">More...</a><br/></td></tr>
<tr class="separator:gaed277941e701357e05662d27cf26f8e4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga61af06e74f87b278b69a501a972e68e8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#ga61af06e74f87b278b69a501a972e68e8">XI2S_TX_AES_STS_LINEAR_PCM_ID_MASK</a>&#160;&#160;&#160;(1 &lt;&lt; <a class="el" href="group__i2stx.html#gaed277941e701357e05662d27cf26f8e4">XI2S_TX_AES_STS_LINEAR_PCM_ID_SHIFT</a>)</td></tr>
<tr class="memdesc:ga61af06e74f87b278b69a501a972e68e8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Linear PCM Identification mask.  <a href="group__i2stx.html#ga61af06e74f87b278b69a501a972e68e8">More...</a><br/></td></tr>
<tr class="separator:ga61af06e74f87b278b69a501a972e68e8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga78cc8bc6611969180c83c93f6a495896"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#ga78cc8bc6611969180c83c93f6a495896">XI2S_TX_AES_STS_AUDIO_SIG_PRE_EMPH_SHIFT</a>&#160;&#160;&#160;(2)</td></tr>
<tr class="memdesc:ga78cc8bc6611969180c83c93f6a495896"><td class="mdescLeft">&#160;</td><td class="mdescRight">Audio signal pre- emphasis bit shift.  <a href="group__i2stx.html#ga78cc8bc6611969180c83c93f6a495896">More...</a><br/></td></tr>
<tr class="separator:ga78cc8bc6611969180c83c93f6a495896"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga36f5fabf2bf95db8602835cc95861fa5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#ga36f5fabf2bf95db8602835cc95861fa5">XI2S_TX_AES_STS_AUDIO_SIG_PRE_EMPH_MASK</a>&#160;&#160;&#160;(0x7 &lt;&lt; XI2S_TX_AES_STS_AUDIO_SIG_PRE_EMPH_SHIFT)</td></tr>
<tr class="memdesc:ga36f5fabf2bf95db8602835cc95861fa5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Audio signal pre-emphasis mask.  <a href="group__i2stx.html#ga36f5fabf2bf95db8602835cc95861fa5">More...</a><br/></td></tr>
<tr class="separator:ga36f5fabf2bf95db8602835cc95861fa5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafa5b86b6aa7c49e9edc95ee095e99ae1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#gafa5b86b6aa7c49e9edc95ee095e99ae1">XI2S_TX_AES_STS_LOCK_INDICATION_SHIFT</a>&#160;&#160;&#160;(5)</td></tr>
<tr class="memdesc:gafa5b86b6aa7c49e9edc95ee095e99ae1"><td class="mdescLeft">&#160;</td><td class="mdescRight">lock indication bit shift  <a href="group__i2stx.html#gafa5b86b6aa7c49e9edc95ee095e99ae1">More...</a><br/></td></tr>
<tr class="separator:gafa5b86b6aa7c49e9edc95ee095e99ae1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6ad2f825b0dda934666fd0c8e66de95f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#ga6ad2f825b0dda934666fd0c8e66de95f">XI2S_TX_AES_STS_LOCK_INDICATION_MASK</a>&#160;&#160;&#160;(1 &lt;&lt; <a class="el" href="group__i2stx.html#gafa5b86b6aa7c49e9edc95ee095e99ae1">XI2S_TX_AES_STS_LOCK_INDICATION_SHIFT</a>)</td></tr>
<tr class="memdesc:ga6ad2f825b0dda934666fd0c8e66de95f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Lock indication mask.  <a href="group__i2stx.html#ga6ad2f825b0dda934666fd0c8e66de95f">More...</a><br/></td></tr>
<tr class="separator:ga6ad2f825b0dda934666fd0c8e66de95f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaab03ab7ac0cf37ff3a8f57008ff6c8b3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#gaab03ab7ac0cf37ff3a8f57008ff6c8b3">XI2S_TX_AES_STS_SAMPLING_FREQ_E_SHIFT</a>&#160;&#160;&#160;(6)</td></tr>
<tr class="memdesc:gaab03ab7ac0cf37ff3a8f57008ff6c8b3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sampling Frequency 0 bit shift.  <a href="group__i2stx.html#gaab03ab7ac0cf37ff3a8f57008ff6c8b3">More...</a><br/></td></tr>
<tr class="separator:gaab03ab7ac0cf37ff3a8f57008ff6c8b3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7938a13abaa67d6d136feabbd6014b1d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#ga7938a13abaa67d6d136feabbd6014b1d">XI2S_TX_AES_STS_SAMPLING_FREQ_E_MASK</a>&#160;&#160;&#160;(0x3 &lt;&lt; XI2S_TX_AES_STS_SAMPLING_FREQ_E_SHIFT)</td></tr>
<tr class="memdesc:ga7938a13abaa67d6d136feabbd6014b1d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sampling Frequency 0 mask.  <a href="group__i2stx.html#ga7938a13abaa67d6d136feabbd6014b1d">More...</a><br/></td></tr>
<tr class="separator:ga7938a13abaa67d6d136feabbd6014b1d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3e5272ba1cc19696a062a2261c7811d3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#ga3e5272ba1cc19696a062a2261c7811d3">XI2S_TX_AES_STS_CH_MODE_SHIFT</a>&#160;&#160;&#160;(0)</td></tr>
<tr class="memdesc:ga3e5272ba1cc19696a062a2261c7811d3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Channel mode bit shift.  <a href="group__i2stx.html#ga3e5272ba1cc19696a062a2261c7811d3">More...</a><br/></td></tr>
<tr class="separator:ga3e5272ba1cc19696a062a2261c7811d3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa8d727003a8e7cc47d0a7e45f506518e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#gaa8d727003a8e7cc47d0a7e45f506518e">XI2S_TX_AES_STS_CH_MODE_MASK</a>&#160;&#160;&#160;(0xF &lt;&lt; XI2S_TX_AES_STS_CH_MODE_SHIFT)</td></tr>
<tr class="memdesc:gaa8d727003a8e7cc47d0a7e45f506518e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Channel mode mask.  <a href="group__i2stx.html#gaa8d727003a8e7cc47d0a7e45f506518e">More...</a><br/></td></tr>
<tr class="separator:gaa8d727003a8e7cc47d0a7e45f506518e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabb8e06582adcf37c20a9db80d9d22881"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#gabb8e06582adcf37c20a9db80d9d22881">XI2S_TX_AES_STS_USR_BITS_MGMT_SHIFT</a>&#160;&#160;&#160;(4)</td></tr>
<tr class="memdesc:gabb8e06582adcf37c20a9db80d9d22881"><td class="mdescLeft">&#160;</td><td class="mdescRight">User Bits Management bit shift.  <a href="group__i2stx.html#gabb8e06582adcf37c20a9db80d9d22881">More...</a><br/></td></tr>
<tr class="separator:gabb8e06582adcf37c20a9db80d9d22881"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4425bdbc5e0d0d757fb94635c60a6279"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#ga4425bdbc5e0d0d757fb94635c60a6279">XI2S_TX_AES_STS_USR_BITS_MGMT_MASK</a>&#160;&#160;&#160;(0xF &lt;&lt; XI2S_TX_AES_STS_USR_BITS_MGMT_SHIFT)</td></tr>
<tr class="memdesc:ga4425bdbc5e0d0d757fb94635c60a6279"><td class="mdescLeft">&#160;</td><td class="mdescRight">User Bits Management mask.  <a href="group__i2stx.html#ga4425bdbc5e0d0d757fb94635c60a6279">More...</a><br/></td></tr>
<tr class="separator:ga4425bdbc5e0d0d757fb94635c60a6279"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7a09ffa618e6590c9e82f91a49b4f68c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#ga7a09ffa618e6590c9e82f91a49b4f68c">XI2S_TX_AES_STS_USEOF_AUX_SMPL_BITS_SHIFT</a>&#160;&#160;&#160;(0)</td></tr>
<tr class="memdesc:ga7a09ffa618e6590c9e82f91a49b4f68c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Use of auxiliary sample bits bit shift.  <a href="group__i2stx.html#ga7a09ffa618e6590c9e82f91a49b4f68c">More...</a><br/></td></tr>
<tr class="separator:ga7a09ffa618e6590c9e82f91a49b4f68c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2792e6c77cf3427d9ba40ecafc84781c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#ga2792e6c77cf3427d9ba40ecafc84781c">XI2S_TX_AES_STS_USEOF_AUX_SMPL_BITS_MASK</a>&#160;&#160;&#160;(0x7 &lt;&lt; XI2S_TX_AES_STS_USEOF_AUX_SMPL_BITS_SHIFT)</td></tr>
<tr class="memdesc:ga2792e6c77cf3427d9ba40ecafc84781c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Use of Auxiliary sample bits mask.  <a href="group__i2stx.html#ga2792e6c77cf3427d9ba40ecafc84781c">More...</a><br/></td></tr>
<tr class="separator:ga2792e6c77cf3427d9ba40ecafc84781c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga16fae1ae006e75519d45a4dc31e2aca1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#ga16fae1ae006e75519d45a4dc31e2aca1">XI2S_TX_AES_STS_SRC_WORD_LENGTH_SHIFT</a>&#160;&#160;&#160;(3)</td></tr>
<tr class="memdesc:ga16fae1ae006e75519d45a4dc31e2aca1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Source word length bit shift.  <a href="group__i2stx.html#ga16fae1ae006e75519d45a4dc31e2aca1">More...</a><br/></td></tr>
<tr class="separator:ga16fae1ae006e75519d45a4dc31e2aca1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaeadd56e1eb2fe7f16e64d20f4cc658a2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#gaeadd56e1eb2fe7f16e64d20f4cc658a2">XI2S_TX_AES_STS_SRC_WORD_LENGTH_MASK</a>&#160;&#160;&#160;(0x7 &lt;&lt; XI2S_TX_AES_STS_SRC_WORD_LENGTH_SHIFT)</td></tr>
<tr class="memdesc:gaeadd56e1eb2fe7f16e64d20f4cc658a2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Source word length mask.  <a href="group__i2stx.html#gaeadd56e1eb2fe7f16e64d20f4cc658a2">More...</a><br/></td></tr>
<tr class="separator:gaeadd56e1eb2fe7f16e64d20f4cc658a2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2d1071669dd6047ca5c4ed69c9dc78a4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#ga2d1071669dd6047ca5c4ed69c9dc78a4">XI2S_TX_AES_STS_INDICATE_ALIGN_LEVEL_SHIFT</a>&#160;&#160;&#160;(6)</td></tr>
<tr class="memdesc:ga2d1071669dd6047ca5c4ed69c9dc78a4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indication of Alignment level bit shift.  <a href="group__i2stx.html#ga2d1071669dd6047ca5c4ed69c9dc78a4">More...</a><br/></td></tr>
<tr class="separator:ga2d1071669dd6047ca5c4ed69c9dc78a4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga00224a5937919a23e18bac70be453341"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#ga00224a5937919a23e18bac70be453341">XI2S_TX_AES_STS_INDICATE_ALIGN_LEVEL_MASK</a>&#160;&#160;&#160;(0x3 &lt;&lt; XI2S_TX_AES_STS_INDICATE_ALIGN_LEVEL_SHIFT)</td></tr>
<tr class="memdesc:ga00224a5937919a23e18bac70be453341"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indication of Alignment level mask.  <a href="group__i2stx.html#ga00224a5937919a23e18bac70be453341">More...</a><br/></td></tr>
<tr class="separator:ga00224a5937919a23e18bac70be453341"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6ea48d72e9607d6d8d8056421054ee85"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#ga6ea48d72e9607d6d8d8056421054ee85">XI2S_TX_AES_STS_CH_NUM0_SHIFT</a>&#160;&#160;&#160;(0)</td></tr>
<tr class="memdesc:ga6ea48d72e9607d6d8d8056421054ee85"><td class="mdescLeft">&#160;</td><td class="mdescRight">Channel Number (0) bit shift.  <a href="group__i2stx.html#ga6ea48d72e9607d6d8d8056421054ee85">More...</a><br/></td></tr>
<tr class="separator:ga6ea48d72e9607d6d8d8056421054ee85"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa34fe37e7fabe3dbe32d1cb3978a7ab3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#gaa34fe37e7fabe3dbe32d1cb3978a7ab3">XI2S_TX_AES_STS_CH_NUM0_MASK</a>&#160;&#160;&#160;(0x7F &lt;&lt; XI2S_TX_AES_STS_CH_NUM0_SHIFT)</td></tr>
<tr class="memdesc:gaa34fe37e7fabe3dbe32d1cb3978a7ab3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Channel Number (0) mask.  <a href="group__i2stx.html#gaa34fe37e7fabe3dbe32d1cb3978a7ab3">More...</a><br/></td></tr>
<tr class="separator:gaa34fe37e7fabe3dbe32d1cb3978a7ab3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa6c85a34557271fafd80989c4d16c3fa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#gaa6c85a34557271fafd80989c4d16c3fa">XI2S_TX_AES_STS_MC_CH_MODE_SHIFT</a>&#160;&#160;&#160;(7)</td></tr>
<tr class="memdesc:gaa6c85a34557271fafd80989c4d16c3fa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multichannel mode bit shift.  <a href="group__i2stx.html#gaa6c85a34557271fafd80989c4d16c3fa">More...</a><br/></td></tr>
<tr class="separator:gaa6c85a34557271fafd80989c4d16c3fa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7444409e9557cb8d2fba5d04791cc90f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#ga7444409e9557cb8d2fba5d04791cc90f">XI2S_TX_AES_STS_MC_CH_MODE_MASK</a>&#160;&#160;&#160;(1 &lt;&lt; <a class="el" href="group__i2stx.html#gaa6c85a34557271fafd80989c4d16c3fa">XI2S_TX_AES_STS_MC_CH_MODE_SHIFT</a>)</td></tr>
<tr class="memdesc:ga7444409e9557cb8d2fba5d04791cc90f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multichannel mode mask.  <a href="group__i2stx.html#ga7444409e9557cb8d2fba5d04791cc90f">More...</a><br/></td></tr>
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<tr class="memitem:ga2119679a117b6557a57553bafb66fa8b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#ga2119679a117b6557a57553bafb66fa8b">XI2S_TX_AES_STS_CH_NUM1_SHIFT</a>&#160;&#160;&#160;(0)</td></tr>
<tr class="memdesc:ga2119679a117b6557a57553bafb66fa8b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Channel Number (1) bit shift.  <a href="group__i2stx.html#ga2119679a117b6557a57553bafb66fa8b">More...</a><br/></td></tr>
<tr class="separator:ga2119679a117b6557a57553bafb66fa8b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0b92225913f1d1397643d294b96a3e79"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#ga0b92225913f1d1397643d294b96a3e79">XI2S_TX_AES_STS_CH_NUM1_MASK</a>&#160;&#160;&#160;(0xF &lt;&lt; XI2S_TX_AES_STS_CH_NUM1_SHIFT)</td></tr>
<tr class="memdesc:ga0b92225913f1d1397643d294b96a3e79"><td class="mdescLeft">&#160;</td><td class="mdescRight">Channel Number (1) mask.  <a href="group__i2stx.html#ga0b92225913f1d1397643d294b96a3e79">More...</a><br/></td></tr>
<tr class="separator:ga0b92225913f1d1397643d294b96a3e79"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabc365c9d82d007f429dbc2c3175ba469"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#gabc365c9d82d007f429dbc2c3175ba469">XI2S_TX_AES_STS_MC_CH_MODE_NUM_SHIFT</a>&#160;&#160;&#160;(4)</td></tr>
<tr class="memdesc:gabc365c9d82d007f429dbc2c3175ba469"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multichannel mode number bit shift.  <a href="group__i2stx.html#gabc365c9d82d007f429dbc2c3175ba469">More...</a><br/></td></tr>
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<tr class="memitem:ga60bdf4661314ff81890dd36a51203c1b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#ga60bdf4661314ff81890dd36a51203c1b">XI2S_TX_AES_STS_MC_CH_MODE_NUM_MASK</a>&#160;&#160;&#160;(0x7 &lt;&lt; XI2S_TX_AES_STS_MC_CH_MODE_NUM_SHIFT)</td></tr>
<tr class="memdesc:ga60bdf4661314ff81890dd36a51203c1b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multichannel mode number mask.  <a href="group__i2stx.html#ga60bdf4661314ff81890dd36a51203c1b">More...</a><br/></td></tr>
<tr class="separator:ga60bdf4661314ff81890dd36a51203c1b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac59f23705e781eb6d2375f7793e05847"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#gac59f23705e781eb6d2375f7793e05847">XI2S_TX_AES_STS_DIGITAL_AUDIO_REF_SIG_SHIFT</a>&#160;&#160;&#160;(0)</td></tr>
<tr class="memdesc:gac59f23705e781eb6d2375f7793e05847"><td class="mdescLeft">&#160;</td><td class="mdescRight">Digital Reference Audio signal bit shift.  <a href="group__i2stx.html#gac59f23705e781eb6d2375f7793e05847">More...</a><br/></td></tr>
<tr class="separator:gac59f23705e781eb6d2375f7793e05847"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac284c05fb5e7d7ad0f7c571cceb92c44"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#gac284c05fb5e7d7ad0f7c571cceb92c44">XI2S_TX_AES_STS_DIGITAL_AUDIO_REF_SIG_MASK</a>&#160;&#160;&#160;(0x3 &lt;&lt; XI2S_TX_AES_STS_DIGITAL_AUDIO_REF_SIG_SHIFT)</td></tr>
<tr class="memdesc:gac284c05fb5e7d7ad0f7c571cceb92c44"><td class="mdescLeft">&#160;</td><td class="mdescRight">Digital Reference Audio signal mask.  <a href="group__i2stx.html#gac284c05fb5e7d7ad0f7c571cceb92c44">More...</a><br/></td></tr>
<tr class="separator:gac284c05fb5e7d7ad0f7c571cceb92c44"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga32a5c5c380f0add139e9973ca5509ea2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#ga32a5c5c380f0add139e9973ca5509ea2">XI2S_TX_AES_STS_RSVD_BUT_UNDEF0_SHIFT</a>&#160;&#160;&#160;(2)</td></tr>
<tr class="memdesc:ga32a5c5c380f0add139e9973ca5509ea2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reserved but undefined (0) bit shift.  <a href="group__i2stx.html#ga32a5c5c380f0add139e9973ca5509ea2">More...</a><br/></td></tr>
<tr class="separator:ga32a5c5c380f0add139e9973ca5509ea2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab54c4d024eec7747b7fdf2a90082ab54"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#gab54c4d024eec7747b7fdf2a90082ab54">XI2S_TX_AES_STS_RSVD_BUT_UNDEF0_MASK</a>&#160;&#160;&#160;(1 &lt;&lt; <a class="el" href="group__i2stx.html#ga32a5c5c380f0add139e9973ca5509ea2">XI2S_TX_AES_STS_RSVD_BUT_UNDEF0_SHIFT</a>)</td></tr>
<tr class="memdesc:gab54c4d024eec7747b7fdf2a90082ab54"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reserved but undefined (0) mask.  <a href="group__i2stx.html#gab54c4d024eec7747b7fdf2a90082ab54">More...</a><br/></td></tr>
<tr class="separator:gab54c4d024eec7747b7fdf2a90082ab54"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab1548ab3982c777016c42ae4a5666fd6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#gab1548ab3982c777016c42ae4a5666fd6">XI2S_TX_AES_STS_SAMPLING_FREQ_Q_SHIFT</a>&#160;&#160;&#160;(3)</td></tr>
<tr class="memdesc:gab1548ab3982c777016c42ae4a5666fd6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sampling Frequency (1) bit shift.  <a href="group__i2stx.html#gab1548ab3982c777016c42ae4a5666fd6">More...</a><br/></td></tr>
<tr class="separator:gab1548ab3982c777016c42ae4a5666fd6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga06846f7b8d66403d152212ba43f193d1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#ga06846f7b8d66403d152212ba43f193d1">XI2S_TX_AES_STS_SAMPLING_FREQ_Q_MASK</a>&#160;&#160;&#160;(0xF &lt;&lt; XI2S_TX_AES_STS_SAMPLING_FREQ_Q_SHIFT)</td></tr>
<tr class="memdesc:ga06846f7b8d66403d152212ba43f193d1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sampling Frequency (1) mask.  <a href="group__i2stx.html#ga06846f7b8d66403d152212ba43f193d1">More...</a><br/></td></tr>
<tr class="separator:ga06846f7b8d66403d152212ba43f193d1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafa41e86e16999bcb460a58866386e054"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#gafa41e86e16999bcb460a58866386e054">XI2S_TX_AES_STS_SAMPLING_FREQ_SCALE_FLAG_SHIFT</a>&#160;&#160;&#160;(7)</td></tr>
<tr class="memdesc:gafa41e86e16999bcb460a58866386e054"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sampling Frequency scaling flag bit shift.  <a href="group__i2stx.html#gafa41e86e16999bcb460a58866386e054">More...</a><br/></td></tr>
<tr class="separator:gafa41e86e16999bcb460a58866386e054"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac50f0435d41fd0b486bb02013ece9bd1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#gac50f0435d41fd0b486bb02013ece9bd1">XI2S_TX_AES_STS_SAMPLING_FREQ_SCALE_FLAG_MASK</a>&#160;&#160;&#160;(1 &lt;&lt; <a class="el" href="group__i2stx.html#gafa41e86e16999bcb460a58866386e054">XI2S_TX_AES_STS_SAMPLING_FREQ_SCALE_FLAG_SHIFT</a>)</td></tr>
<tr class="memdesc:gac50f0435d41fd0b486bb02013ece9bd1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sampling Frequency scaling flag mask.  <a href="group__i2stx.html#gac50f0435d41fd0b486bb02013ece9bd1">More...</a><br/></td></tr>
<tr class="separator:gac50f0435d41fd0b486bb02013ece9bd1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga60f5065e192f127698ebd215693532d2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#ga60f5065e192f127698ebd215693532d2">XI2S_TX_AES_STS_RSVD_BUT_UNDEF1_SHIFT</a>&#160;&#160;&#160;(0)</td></tr>
<tr class="memdesc:ga60f5065e192f127698ebd215693532d2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reserved but undefined (1) bit shift.  <a href="group__i2stx.html#ga60f5065e192f127698ebd215693532d2">More...</a><br/></td></tr>
<tr class="separator:ga60f5065e192f127698ebd215693532d2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2417522499255b6d277cf54940eb5873"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#ga2417522499255b6d277cf54940eb5873">XI2S_TX_AES_STS_RSVD_BUT_UNDEF1_MASK</a>&#160;&#160;&#160;(0xFF &lt;&lt; XI2S_TX_AES_STS_RSVD_BUT_UNDEF1_SHIFT)</td></tr>
<tr class="memdesc:ga2417522499255b6d277cf54940eb5873"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reserved but undefined (1) mask.  <a href="group__i2stx.html#ga2417522499255b6d277cf54940eb5873">More...</a><br/></td></tr>
<tr class="separator:ga2417522499255b6d277cf54940eb5873"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadd0c030f77a5fcb8c4a947a095bebff3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#gadd0c030f77a5fcb8c4a947a095bebff3">XI2S_TX_AES_STS_ALPHANUM_CH_ORG_DATA_OFFSET</a>&#160;&#160;&#160;(6)</td></tr>
<tr class="memdesc:gadd0c030f77a5fcb8c4a947a095bebff3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Alphanumeric channel origin data register(s) offset.  <a href="group__i2stx.html#gadd0c030f77a5fcb8c4a947a095bebff3">More...</a><br/></td></tr>
<tr class="separator:gadd0c030f77a5fcb8c4a947a095bebff3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac420217f8cd0d4a9970399ae81cf01c1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#gac420217f8cd0d4a9970399ae81cf01c1">XI2S_TX_AES_STS_ALPHANUM_CH_DEST_DATA_OFFSET</a>&#160;&#160;&#160;(10)</td></tr>
<tr class="memdesc:gac420217f8cd0d4a9970399ae81cf01c1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Alphanumeric channel destination data bit shift.  <a href="group__i2stx.html#gac420217f8cd0d4a9970399ae81cf01c1">More...</a><br/></td></tr>
<tr class="separator:gac420217f8cd0d4a9970399ae81cf01c1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga77f91a5fe07d9b303b311f3c578b4f72"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#ga77f91a5fe07d9b303b311f3c578b4f72">XI2S_TX_AES_STS_LOCAL_SAMPLE_ADDRCODE_OFFSET</a>&#160;&#160;&#160;(14)</td></tr>
<tr class="memdesc:ga77f91a5fe07d9b303b311f3c578b4f72"><td class="mdescLeft">&#160;</td><td class="mdescRight">Local sample address code register(s) offset.  <a href="group__i2stx.html#ga77f91a5fe07d9b303b311f3c578b4f72">More...</a><br/></td></tr>
<tr class="separator:ga77f91a5fe07d9b303b311f3c578b4f72"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga20282a1477a1bd5c341d125779741b53"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#ga20282a1477a1bd5c341d125779741b53">XI2S_TX_AES_STS_TIMEOFDAY_SAMPLE_ADDRCODE_OFFSET</a>&#160;&#160;&#160;(18)</td></tr>
<tr class="memdesc:ga20282a1477a1bd5c341d125779741b53"><td class="mdescLeft">&#160;</td><td class="mdescRight">Time-of-day sample address code register(s) offset.  <a href="group__i2stx.html#ga20282a1477a1bd5c341d125779741b53">More...</a><br/></td></tr>
<tr class="separator:ga20282a1477a1bd5c341d125779741b53"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1424825d020d189367c1d66634b3c704"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#ga1424825d020d189367c1d66634b3c704">XI2S_TX_AES_STS_RELIABLE_FLAGS_OFFSET</a>&#160;&#160;&#160;(22)</td></tr>
<tr class="memdesc:ga1424825d020d189367c1d66634b3c704"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reliability flags bit shift.  <a href="group__i2stx.html#ga1424825d020d189367c1d66634b3c704">More...</a><br/></td></tr>
<tr class="separator:ga1424825d020d189367c1d66634b3c704"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae5dd63d1443d92e1002b3a67cc6a1a84"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#gae5dd63d1443d92e1002b3a67cc6a1a84">XI2S_TX_AES_STS_CRC_CHAR_OFFSET</a>&#160;&#160;&#160;(23)</td></tr>
<tr class="memdesc:gae5dd63d1443d92e1002b3a67cc6a1a84"><td class="mdescLeft">&#160;</td><td class="mdescRight">Cyclic redundancy check character bit shift.  <a href="group__i2stx.html#gae5dd63d1443d92e1002b3a67cc6a1a84">More...</a><br/></td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:ga408ca1dccbd6c8c87103ec3d2e97c5bc"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2stx.html#ga408ca1dccbd6c8c87103ec3d2e97c5bc">XI2s_Tx_ReslveAesChStat</a> (u8 I2stx_SrcBuf[])</td></tr>
<tr class="memdesc:ga408ca1dccbd6c8c87103ec3d2e97c5bc"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function reads the array I2stx_SrcBuf which has the values of all the I2S Transmitter AES status registers, extracts the required bits and prints them.  <a href="group__i2stx.html#ga408ca1dccbd6c8c87103ec3d2e97c5bc">More...</a><br/></td></tr>
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